The high speed and the high integration of LSI have been made by downsizing MOS type FETs (Field Effect Transistors) based on the scaling rule. The downsizing of MOSFET based on the scaling rule is means for simultaneously reducing the height-wise dimension and the width-wise dimension of the respective constituent elements of a MOSFET, such as the gate insulating film of silicon oxide (SiO2) and the gate length of the gate electrode, etc. Such means have made it possible for MOSFETs to retain the characteristics normal when downsized while improving the performance.
MOSFETs have so far kept on being downsized, and based on the scaling rule, the MOSFETs of the next generation need the gate insulating film of silicon oxide of a 1 nm-thickness or below. However, this film thickness range is a thickness at which the direct tunnel current starts to flow. Accordingly, the leak current cannot be suppressed, and problems of electric power consumption increase, etc. cannot be prevented.
Then, it is proposed to use a high dielectric constant material having a higher dielectric constant than silicon oxide as a material for a gate insulating film to thereby decrease the physical film thickness while the effective film thickness converted into silicon oxide film is kept below 1 nm including 1 nm. For example, oxides (oxynitrides) of hafnium (Hf) as the main component have high dielectric constants which are higher by about several times to 10 times the dielectric constant of silicon oxide. Accordingly, the Hf-based high dielectric constant insulating film of oxides (oxynitrides) of Hf as the main component are expected to be the gate insulating film material of the next generation.
On the other hand, for the material of the gate electrode, the use of a metal material is being studied. The metal gate of the metal material has the merits that the depletion does not take place and additionally that the gate resistance can be decreased. However, the metal gate has poor heat resistance and furthermore, it is difficult to control the work function. As the material of the gate electrode, polysilicon is considered to be still leading.
Thus, it is urgent to develop an MOSFET combining the gate electrode of polysilicon and the Hf-based high dielectric constant insulating film.
Conventionally, when the Hf-based high dielectric constant insulating film is used in the gate insulating film, a silicon oxide film or silicon oxide nitride film of a 0.8 nm-thickness or below is formed on a silicon substrate as the process before the Hf-based high dielectric constant insulating film is formed, and the Hf-based high dielectric constant insulating film is formed thereon by CVD. After the Hf-based high dielectric constant insulating film has been formed, the thermal processing called PDA (Post Deposition Anneal) is made, and then a polysilicon film to be the gate electrode is simply deposited.
Background arts are disclosed in, e.g., Japanese published unexamined patent application No. 2005-191341 and Japanese published unexamined patent application No. 2005-158998.